Silicon Laboratories SI4421 Manuel d'utilisateur télécharger pdf (Page 8)

Si4702/03-C19

8 Rev. 1.1

Figure 3. 3-Wire Control Interface Write Timing Parameters

Table 6. 3-Wire Control Interface Characteristics

= V

= 2.7 to 5.5 V, V

= 1.5 to 3.6 V, T

= –20 to 85 °C)

Parameter Symbol Test Condition Min Typ Max Unit

SCLK Frequency f

CLK

0—2.5MHz

SCLK High Time t

HIGH

25 — — ns

SCLK Low Time t

LOW

25 — — ns

SDIO Input, SEN

to SCLKSetup t

20 — — ns

SDIO Input to SCLKHold t

HSDIO

10 — — ns

SEN

Input to SCLKHold t

HSEN1

10 — — ns

SEN

Input to SCLKHold t

HSEN2

10 — — ns

SCLKto SDIO Output Valid t

CDV

Read 2 — 25 ns

SCLKto SDIO Output High Z t

CDZ

Read 2 — 25 ns

Note: When selecting 3-wire Mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the

rising edge of RST

SCLK

70%

30%

SEN

70%

30%

SDIO

A7 A0

70%

30%

HSDIO

HSEN1

A6-A5,

R/W,

A4-A1

Address In Data In

D15 D14-D1 D0

HIGH

LOW

HSEN2

1 2 3 4 5 6 7 8 9 10 11 12 13 ... 45 46

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Silicon Laboratories SI4421 Manuel d'utilisateur Page 8

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